The quad-flat-no-lead packaging (QFN) market combines a compact SMT outline with short electrical paths and, in many variants, an exposed thermal pad. According to the supplied report page, the market was valued at USD 3.46 billion in 2024 and is projected to reach USD 3.99 billion by 2032, a 2.1% CAGR.

The package remains important across power management, analog, automotive, connectivity and sensor ICs because it can reduce board area while remaining compatible with established surface-mount production. Competition now spans package manufacturers and OSATs as well as semiconductor companies that deliberately engineer QFN geometry to improve thermal and electrical performance.

Amkor Technology

Amkor’s MicroLeadFrame family is a direct manufacturing foundation for QFN because it spans QFN, MLF, LFCSP, VQFN, SON and DFN variants.

Amkor describes the package as a near-chip-scale copper-leadframe structure with perimeter lands and an exposed die-attach paddle. The exposed pad creates an efficient heat path into the PCB and can also support electrical grounding. The company positions the architecture for compact products such as smartphones and tablets as well as other applications where size, weight, thermal and electrical performance must be balanced.

Texas Instruments

TI has turned QFN into a performance feature through Enhanced HotRod and HotRod package architectures used in power-management modules.

The TPSM65630, for example, uses an Enhanced HotRod QFN around 5.8 × 5.2 × 2.93 mm, supports a 3–65 V input range and can exceed 92% peak efficiency under specified conditions. The TPSM53602 uses an approximately 5 × 5.5 × 4 mm package and reaches up to 95% efficiency in its specified operating envelope.

STMicroelectronics

ST uses QFN across analog, power, interface and protection devices, making the package relevant to both consumer and long-lifecycle industrial applications.

Current ST products include active QFN-16 and QFN-18 devices with 10-year longevity commitments beginning in 2026, while QFN-24 products address industrial ranges down to -40°C and up to +105°C. The package is therefore part of ST’s lifecycle and thermal strategy, not merely a low-cost outline.

Renesas Electronics

Renesas uses QFN for power, interface and analog products where a thin leadless package can provide high pin density without the solder-ball architecture of BGA.

A 2026 Renesas example uses a 52-QFN package of about 6 × 6 × 1.0 mm with 0.4 mm pitch. That illustrates why QFN remains attractive for automotive and industrial electronics: substantial integration can fit inside a thin, inspection-friendly SMT package.

NXP Semiconductors

NXP uses QFN and related no-lead packages across automotive, connectivity and industrial ICs, where thermal paths and board-level reliability matter.

In automotive electronics, the exposed-pad structure can transfer heat directly into the PCB while the short electrical path limits unwanted inductance. This is useful for mixed-signal, interface and power functions where package height and long-term reliability are important.

Infineon Technologies

Infineon uses QFN and related leadless packages across power, sensors and connectivity, particularly when the PCB can be used as part of the thermal solution.

For switching and automotive power devices, exposed pads and short current paths can help manage both heat and parasitics. The breadth of Infineon’s portfolio also lets customers standardize leadless assembly across different semiconductor functions.

onsemi

onsemi uses QFN and DFN packages across power, analog, automotive and sensing products.

The key engineering benefit is the combination of a compact outline, surface-mount assembly and a thermal path through the PCB. As automotive electrification increases switching power density, these package characteristics become increasingly important to the electrical design.

Microchip Technology

Microchip uses QFN and DFN across microcontrollers, interfaces, analog ICs and power products, keeping the package relevant in long-life embedded systems.

For OEMs, a stable QFN footprint can allow a silicon generation change without a complete PCB redesign. That is particularly valuable in industrial and control products where qualification and field maintenance cycles are measured in years.

ASE Technology

ASE is relevant to QFN from the OSAT side: it provides high-volume semiconductor assembly and test capabilities for leadframe and no-lead packages.

The OSAT value is process control. QFN manufacturing depends on molding, leadframe handling, singulation, plating, coplanarity and final test working together at high yield. As more automotive and connectivity chips use QFN, manufacturing consistency becomes a differentiator rather than a back-end commodity.

JCET

JCET is another major OSAT participant with leadframe and no-lead package capabilities, supplying volume assembly for consumer, industrial and automotive semiconductors.

QFN competitiveness at the manufacturing level depends on controlling package warpage, dimensional tolerances, plating and singulation yield. JCET’s role is therefore important to the industrialization of QFN designs even when the package itself was designed by a chip company.

How the Competitive Landscape Is Changing

QFN competition is increasingly split between manufacturing specialists and chip companies that use package geometry as part of product performance. Amkor, ASE and JCET compete on package process capability, while TI, ST, Renesas, NXP, Infineon, onsemi and Microchip use QFN to solve thermal, signal-integrity and board-density problems.

TI’s Enhanced HotRod approach shows the shift particularly well: package construction is used to reduce inductance and improve converter behavior. Renesas’ thin 52-QFN example shows a different advantage—significant integration inside a compact 1.0 mm-class package.

As a result, buyers increasingly evaluate QFN through a combination of electrical performance, thermal design, PCB rules, assembly yield and long-term availability.

Key Technology Trends Shaping the Top Players

Exposed pads turn the PCB into part of the package

Amkor’s MicroLeadFrame uses an exposed die-attach paddle to create an efficient heat path into the PCB. The board therefore becomes part of the device’s thermal design.

That matters as power density rises. Package selection increasingly has to be coordinated with copper area, thermal vias and board stack-up.

Low parasitic inductance is becoming a selling point

TI’s Enhanced HotRod architecture is a direct example of QFN geometry being used to shorten current paths and reduce parasitic effects in switching power stages.

The package can therefore influence system-level efficiency and transient behavior, not just product size.

Thinness and manufacturability remain core advantages

Renesas’ 6 × 6 × 1.0 mm, 0.4 mm-pitch example shows how much functionality can fit in a thin leadless package.

For automotive and industrial OEMs, QFN also benefits from established SMT assembly and inspection practices, which can support predictable production cost.