Navitas Semiconductor has expanded its 5th-generation GeneSiC technology platform with the launch of two advanced packaging solutions top-side-cooled QDPAK and a low-profile TO-247-4L package. The new designs support the company’s latest 1200V silicon carbide (SiC) MOSFETs, delivering improved power density, thermal efficiency, and system reliability. 

The devices are built on Trench-Assisted Planar (TAP) technology, which provides around 35% improvement in the RDS, ON × QGD figure of merit and approximately 25% enhancement in the QGD/QGS ratio. Combined with a stable threshold voltage above 3V, the technology helps prevent parasitic turn-on while enabling predictable and efficient switching performance. 

Advanced Packaging for High-Performance Applications 

The top-side-cooled QDPAK package improves thermal management by enabling heat dissipation directly through the top of the package to the heat sink. This design reduces thermal limitations associated with conventional PCB cooling while supporting smaller system footprints and high-frequency switching. With a compact 15mm × 21mm footprint and only 2.3mm height, the package also supports larger die sizes and higher current capabilities. 

Meanwhile, the low-profile TO-247-4L package is designed for power electronics systems with limited vertical clearance. By minimizing the package height on the PCB assembly, it enables higher power density in compact designs, making it well suited for applications such as AI data-center power supplies and other high-density energy systems. 

With these new packaging innovations, Navitas aims to address increasing industry demand for more efficient and compact power semiconductor solutions, particularly in rapidly growing sectors like AI infrastructure and advanced energy systems. 

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